An input/output (I/O) device such as a network interface card (NIC) may couple to a processing element on a host computing platform or network device such a server. The I/O device may use a receive queue (e.g., maintained in a cache for the processing element) to indicate to the processing element that data destined for the processing element has been received by the I/O device. The data destined for the processing element may have been placed by the I/O device in receive buffers maintained in a memory for the host network device. The memory for the host network device may be a type of memory such as dynamic random access memory (DRAM) or other types of volatile memory.
Typically, a number of receive buffers are allocated to a queue for a processing element to sustain a line rate throughput. For example, at a line rate of 10 gigabits/second (Gbs), and an average time to recycle a buffer of 0.1 seconds, 125 megabytes (MB) of memory for receive buffers may be allocated to the queue to sustain a line rate throughput for that queue. Also, in examples where the processing element may be implemented as a virtual machine (VM), technologies such as VM device queue (VMDq) or single-root L/O virtualization (SR-IOV) may result in several different queues for a single processing element.
The number of processing elements coupled to a given I/O device has also grown with the deployment of multi-core processors as well as the implementation of VMs on one or more cores of these multi-core processors. Some I/O devices may be designed to support hundreds of VMs and thousands of queues. Consequently, supporting thousands of queues would require hundreds of Gigabytes (GBs) of memory for receive buffers in order to sustain a line rate throughput for each queue.